Reference. Unifying Static and Dynamic Intermediate Languages for Accelerator Generators
Compilers for accelerator design languages (ADLs) translate high-level languages into application-specific hardware. ADL compilers rely on a hardware control interface to compose hardware units. There are two choices: static control, which relies on cycle-level timing; or dynamic control, which uses explicit signalling to avoid depending on timing details. Static control is efficient but brittle; dynamic control incurs hardware costs to support compositional reasoning. Piezo is an ADL compiler that unifies static and dynamic control in a single intermediate language (IL). Its key insight is that the IL’s static fragment is a refinement of its dynamic fragment: static code admits a subset of the run-time behaviors of the dynamic equivalent. Piezo can optimize code by combining facts from static and dynamic submodules, and it opportunistically converts code from dynamic to static control styles. We implement Piezo as an extension to an existing dynamic ADL compiler, Calyx. We use Piezo to implement a frontend for an existing ADL, a systolic array generator, and a packet-scheduling hardware generator to demonstrate its optimizations and the static–dynamic interactions it enables.
Cite
Cites 47 works (4 here)
With notes (4)
Stepwise Debugging for Hardware Accelerators berlstein-2023-stepwise
Modular Hardware Design with Timeline Types nigam_amorim_sampson_2023
Modular design is a key challenge for enabling large-scale reuse of hardware modules. Unlike software, however, hardware designs correspond to physical circuits and inherit constraints from them. Timing constraints—which cycle a signal arrives, when an input is read—and structural constraints—how often a multiplier accepts new inputs—are fundamental to hardware interfaces. Existing hardware design languages do not provide a way to encode these constraints; a user must read documentation, build scripts, or in the worst case, a module’s implementation to understand how to use it. We present Filament, a language for modular hardware design that supports the specification and enforcement of timing and structural constraints for statically scheduled pipelines. Filament uses timeline types, which describe the intervals of clock-cycle time when a given signal is available or required. Filament enables safe composition of hardware modules, ensures that the resulting designs are correctly pipelined, and predictably lowers them to efficient hardware.
A compiler infrastructure for accelerator generators nigam-2021-a
Predictable accelerator design with time-sensitive affine types nigam-2020-predictable
External (43)
- Balancing Static Islands in Dynamically Scheduled Circuits Using Continuous Petri Nets (2023)
- Accelerating Halide on an FPGA (2023)
- Formal Abstractions for Packet Scheduling (2023)
- Compiler Discovered Dynamic Scheduling of Irregular Code in High-Level Synthesis (2023)
- Building a Reusable and Extensible Automatic Compiler Infrastructure for Reconfigurable Devices (2023)
- Compress static FSMs (Calyx GitHub issue/PR) (2023)
- Fix top-down static timing (Calyx GitHub issue/PR) (2023)
- Problems with static FSMs (Calyx GitHub issue/PR) (2023)
- Finding and Finessing Static Islands in Dynamically Scheduled Circuits (2022)
- HECTOR: A Multi-level Intermediate Representation for Hardware Synthesis Methodologies (2022)
- HLS from PyTorch to System Verilog with MLIR and CIRCT (2022)
- MLIR: Scaling Compiler Infrastructure for Domain Specific Computation (2021)
- HIR: An MLIR-based Intermediate Representation for Hardware Accelerator Description (2021)
- Intel High Level Synthesis Compiler (2021)
- PolyBench/C: The Polyhedral Benchmark Suite (2021)
- Catapult high-level synthesis (2021)
- Combining Dynamic & Static Scheduling in High-level Synthesis (2020)
- Using deep programmability to put network owners in control (2020)
- Type-directed scheduling of streaming accelerators (2020)
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- PolySA: Polyhedral-Based Systolic Array Auto-Compilation (2018)
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- oneAPI deep neural network library developer guide and reference