Reference. An Axiomatic Basis for Computer Programming on Relaxed Hardware Architectures: The AxSL Logics
Cite
Cites 102 works (7 here)
With notes (7)
Precise exceptions in relaxed architectures simner-2025-precise
Trillium: Higher-Order Concurrent and Distributed Separation Logic for Intensional Refinement timany-2024-trillium
Simuliris: A Separation Logic Framework for Verifying Concurrent Program Optimizations gaher_etal_simuliris_2022
Today’s compilers employ a variety of non-trivial optimizations to achieve good performance. One key trick compilers use to justify transformations of concurrent programs is to assume that the source program has no data races: if it does, they cause the program to have undefined behavior (UB) and give the compiler free rein. However, verifying correctness of optimizations that exploit this assumption is a non-trivial problem. In particular, prior work either has not proven that such optimizations preserve program termination (particularly non-obvious when considering optimizations that move instructions out of loop bodies), or has treated all synchronization operations as external functions (losing the ability to reorder instructions around them).
In this work we present Simuliris, the first simulation technique to establish termination preservation (under a fair scheduler) for a range of concurrent program transformations that exploit UB in the source language. Simuliris is based on the idea of using ownership to reason modularly about the assumptions the compiler makes about programs with well-defined behavior. This brings the benefits of concurrent separation logics to the space of verifying program transformations: we can combine powerful reasoning techniques such as framing and coinduction to perform thread-local proofs of non-trivial concurrent program optimizations. Simuliris is built on a (non-step-indexed) variant of the Coq-based Iris framework, and is thus not tied to a particular language. In addition to demonstrating the effectiveness of Simuliris on standard compiler optimizations involving data race UB, we also instantiate it with Jung et al.’s Stacked Borrows semantics for Rust and generalize their proofs of interesting type-based aliasing optimizations to account for concurrency.
Transfinite Iris: resolving an existential dilemma of step-indexed separation logic spies-2021-transfinitex
Iris from the ground up: A modular foundation for higher-order concurrent separation logic jung_etal_iris_ground_up_2018
Iris: Monoids and Invariants as an Orthogonal Basis for Concurrent Reasoning jung-2015-iris
Separation logic: A logic for shared mutable data structures reynolds_separation_2002
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- ArchSem: Reusable Rigorous Semantics of Relaxed Architectures (2026)
- Puss in Boots: Formalizing Arm’s Virtual Memory System Architecture (2024)
- An Axiomatic Basis for Computer Programming on the Relaxed Arm-A Architecture: The AxSL Logic (2024)
- Specifying and Verifying Persistent Libraries (2024)
- Rely-Guarantee Reasoning for Causally Consistent Shared Memory (2023)
- VMSL: A Separation Logic for Mechanised Robust Safety of Virtual Machines Communicating above FF-A (2023)
- Spirea: A Mechanized Concurrent Separation Logic for Weak Persistent Memory (2023)
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